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  SFS9Z34 bv dss = -60 v r ds(on) = 0.14 ? i d = -12 a -60 -12 -8.4 -48 555 -12 3.6 -5.5 36 0.24 - 55 to +175 300 4.17 62.5 -- -- 2 0 + _ n avalanche rugged technology n rugged gate oxide technology n lower input capacitance n improved gate charge n 175 o c operating temperature n extended safe operating area n lower leakage current : 10 a(max.) @ v ds = -60v n low r ds(on) : 0.106 ? (typ.) advanced power mosfet thermal resistance junction-to-case junction-to-ambient r jc r ja o c/w characteristic max. units symbol typ. features absolute maximum ratings drain-to-source voltage continuous drain current (t c =25 o c) continuous drain current (t c =100 o c) drain current-pulsed gate-to-source voltage single pulsed avalanche energy avalanche current repetitive avalanche energy peak diode recovery dv/dt total power dissipation (t c =25 o c) linear derating factor operating junction and storage temperature range maximum lead temp. for soldering purposes, 1/8? from case for 5-seconds characteristic value units symbol i dm v gs e as i ar e ar dv/dt i d p d t j , t stg t l a v mj a mj v/ns w w/ o c a o c v dss v to-220f 1.gate 2. drain 3. source 3 2 1 o 1 o 2 o 3 o 1 o 1 rev. c
SFS9Z34 -60 -- -2.0 -- -- -- -- -- -0.05 -- -- -- -- -- 265 84 14 24 43 28 30 5.3 12 -- -- -4.0 -100 100 -10 -100 0.14 -- 1155 400 125 40 60 95 65 38 -- -- 7.9 890 -- -- -- 85 0.25 -12 -48 -3.9 -- -- notes ; repetitive rating : pulse width limited by maximum junction temperature l=4.5mh, i as =-12a, v dd =-25v, r g =27 ? * , starting t j =25 o c i sd -18a, di/dt 300a/ s, v dd bv dss , starting t j =25 o c pulse test : pulse width = 250 s, duty cycle 2% essentially independent of operating temperature _ < o 1 o 2 o 3 o 4 o 5 _ < _ < _ < p-channel power mosfet electrical characteristics (t c =25 o c unless otherwise specified) drain-source breakdown voltage breakdown voltage temp. coeff. gate threshold voltage gate-source leakage , forward gate-source leakage , reverse characteristic symbol max. units typ. min. test condition static drain-source on-state resistance forward transconductance input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time total gate charge gate-source charge gate-drain(?miller?) charge g fs c iss c oss c rss t d(on) t r t d(off) t f q g q gs q gd bv dss ? bv/ ? t j v gs(th) r ds(on) i gss i dss v v/ o c v na a ? ? pf ns nc -- -- -- -- -- -- -- -- -- -- -- -- -- v gs =0v,i d =-250 a i d =-250 a see fig 7 v ds =-5v,i d =-250 a v gs =-20v v gs =20v v ds =-60v v ds =-48v,t c =150 o c v gs =-10v,i d =-6.0a v ds =-30v,i d =-6.0a v dd =-30v,i d =-18a, r g =12 see fig 13 v ds =-48v,v gs =-10v, i d =-18a see fig 6 & fig 12 drain-to-source leakage current v gs =0v,v ds =-25v,f =1mhz see fig 5 source-drain diode ratings and characteristics continuous source current pulsed-source current diode forward voltage reverse recovery time reverse recovery charge i s i sm v sd t rr q rr characteristic symbol max. units typ. min. test condition -- -- -- -- -- a v ns c integral reverse pn-diode in the mosfet t j =25 o c,i s =-12a,v gs =0v t j =25 o c,i f =-18a di f /dt=100a/ s ? o 4 o 5 o 4 o 4 o 5 o 4 o 4 o 4 o 1
SFS9Z34 0 10203040506070 0.0 0.1 0.2 0.3 0.4 @ note : t j = 25 o c v gs = -20 v v gs = -10 v r ds(on) , [ ? ] drain-source on-resistance -i d , drain current [a] 10 -1 10 0 10 1 10 0 10 1 @ notes : 1. 250 s pulse test 2. t c = 25 o c v gs top : - 1 5 v - 10 v - 8.0 v - 7.0 v - 6.0 v - 5.5 v - 5.0 v bottom : - 4.5 v -i d , drain current [a] -v ds , drain-source voltage [v] 246810 10 -1 10 0 10 1 25 o c 175 o c - 55 o c @ notes : 1. v gs = 0 v 2. v ds = -30 v 3. 250 s pulse test -i d , drain current [a] -v gs , gate-source voltage [v] 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 -1 10 0 10 1 175 o c 25 o c @ notes : 1. v gs = 0 v 2. 250 s pulse test -i dr , reverse drain current [a] -v sd , source-drain voltage [v] 10 0 10 1 0 300 600 900 1200 1500 c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd @ notes : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] -v ds , drain-source voltage [v] 0 5 10 15 20 25 30 35 0 5 10 v ds = -48 v v ds = -30 v v ds = -12 v @ notes : i d =-18 a -v gs , gate-source voltage [v] q g , total gate charge [nc] p-channel power mosfet fig 1. output characteristics fig 2. transfer characteristics fig 6. gate charge vs. gate-source voltage fig 5. capacitance vs. drain-source voltage fig 4. source-drain diode forward voltage fig 3. on-resistance vs. drain current
SFS9Z34 -75 -50 -25 0 25 50 75 100 125 150 175 200 0.0 0.5 1.0 1.5 2.0 2.5 @ notes : 1. v gs = -10 v 2. i d = -9.0 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 0 10 1 10 2 10 -1 10 0 10 1 10 2 10 ms dc 1 ms 0.1 ms @ notes : 1. t c = 25 o c 2. t j = 175 o c 3. single pulse operation in this area is limited by r ds(on) -i d , drain current [a] -v ds , drain-source voltage [v] -75 -50 -25 0 25 50 75 100 125 150 175 200 0.8 0.9 1.0 1.1 1.2 @ notes : 1. v gs = 0 v 2. i d = -250 a -bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] 25 50 75 100 125 150 175 0 3 6 9 12 15 -i d , drain current [a] t c , case temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -1 10 0 10 1 single pulse 0.2 0.1 0.01 0.02 0.05 d=0.5 @ notes : 1. z jc (t)=4.17 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm -t c =p dm *z jc (t) z jc (t) , thermal response t 1 , square wave pulse duration [sec] p-channel power mosfet fig 7. breakdown voltage vs. temperature fig 8. on-resistance vs. temperature fig 11. thermal response fig 10. max. drain current vs. case temperature fig 9. max. safe operating area p dm . t 1. t 2.
SFS9Z34 p-channel power mosfet fig 12. gate charge test circuit & waveform fig 13. resistive switching test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms e as =l l i as 2 ---- 2 1 -------------------- bv dss -- v dd bv dss v in v out 10% 90% t d(on) t r t on t off t d(off) t f charge v gs -10v q g q gs q gd vary t p to obtain required peak i d -10v v dd c l l v ds i d r g t p dut bv dss t p v dd i as v ds (t) i d (t) time v dd ( 0.5 rated v ds ) -10v v out v in r l dut r g -3ma v gs current sampling (i g ) resistor current sampling (i d ) resistor dut v ds 300nf 50k 200nf 12v same type as dut ? current regulator ? r 1 r 2 ?
SFS9Z34 p-channel power mosfet fig 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + -- l i s driver v gs r g compliment of dut (n-channel) v gs ? dv/dt controlled by ?r g ? ?i s controlled by duty factor ?d? v dd 10v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward voltage drop v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period --------------------------
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?


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